Silicon Design

Cadence Virtuoso Design Simulation

The project will open to a Schematic and Graph window and simulate.

License requirements: Translated Spectre Designs (SPS-100), Nonlinear simulator (MWO-2XX), and VSS Communication standards (VSS-350)

1. The instance on the Schematic is an imported Spectre netlist.
2. Because of shared model source code the circuit will give the same results as it would in Spectre.
3. Note the single tone Microwave Office results and the 802.11a 36 Mpbs VSS results
4. Imported designs are managed in PDKs so browse to Elements > Libraries > mmic_pkg > mmic_pkg and show that the translated design named mmic is available for placement.
5. Note that the symbol was imported from Cadence using the Open Access Import/Export Wizard and that the layout is an imported GDSII file.
6. If interested in the Spectre netlist import process choose Scripts > Demo > Import Spectre Netlist Demo and follow the script instructions.
7. Click Done to close the script.

Improved AXIEM Mesh and Accuracy

The design shown was simulated in AXIEM under Cadence Virtuoso and then transferred to Microwave Office for additional analysis. The EM setup illustrates some of the new work done for fast and accurate EM analysis of silicon designs.

This demo will open the project, tile the relevant windows, and simulate

License requirements: AXIEM (XEM-001)

1. Note the efficient mesh on the Diff Tapped Spiral 3D layout from improvements in the AXIEM meshing algorithm.
2. Double click on Information under the Diff Tapped Spiral EM Structure in the Project Tree and scroll to the bottom of the Sim Log.
3. Note that the analysis ran from 0 - 20 GHz under 20 seconds.
4. Enable the disabled annotation under the Diff Tapped Spiral EM Structure in the Project Tree to see the EM current.
5. Push the Animate Play button on the toolbar to animate the EM currents.